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CSC-SGS BPLCS® Technology, PLC 4th Generation

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

etc.,to reduce the network noises effect to provides a unique communication and reliability in transmission data bidirectionally, this chip designed with SMD/SOP package to reduce the chip size, and increasing protection efficiency, reduce operations costs.

 

This chip as those of previous generations is one of the most successful chips available in market globally technologically in the field of communication via the electricity of low-voltage networks, it has a high resistance to extreme noise and also not affected by the fluctuations of currents in addition that its not affected by any borne electro-magnetic fields, whatever its severity.

 

The PLC's BPLCS® SSC114-E G4 chip applications mainly in the field of automated meter reading, power industry or other public sector provides the best-AMR/AMI solutions for SMART GRID.

 

SSC114-E G4 chip features:

 

  • Centralized and distributed mixed network structure.

  • Active receiver technology, so that the path to a more stable and robust.

  • Table number, alarm events automatically upload feature.

  • Take the initiative to apply for a table-side to the MCU address.

  • Rational and efficient compression algorithm, compression packets, to improve communication ability and stability.

  • Software correlator and a matched filter, 63-bit code sequence.

  • High-performance digital signal processing techniques.

  • Spread spectrum communication techniques, high efficiency forward error correction for the Narrow and Wide bands.

  • BFSK, SFSK modulation, half-duplex communication, the code rate up to 20.8km porter.

  • Forwarding mechanism to support efficient node Frame Relay depth of seven routing.

  • Programmable network address, address filtering, provide local access to data.

  • The received signal strength weight parameter indicates support for the relay search algorithm, improve communication system stability and functionality.

  • The support phase detector (requires local AC zero crossing detection circuit).

  • Support large data transfers of up to 176 bytes of the application the data (DLMS/COSEM data domain).

  • Five-layer network architecture: the physical layer, data link layer, network, transport layer and application layer. Among them, the DLL protocol specification of the data link layer is based on high-level data link control protocol application layer communication protocol is fully compatible in IEC 61036 (2000) and IEC 61036 (2007) of specification, network layer integration V2, V3, V3.5 Edition network layer communication protocol. Particularly suitable for PLC carrier to achieve multi-rate watt-hour meter, provide the best AMR solution for multi-rate watt-hour meter.

  • Stand by V3 Version has MAC Address of the network layer communication protocol.

  • Stand by V3.5 Generation carrier communication protocol.

 

Depending on experience extends to more than twenty years in the design and development of communications Chips, SGS Marshall Inc. release the generation IV  of PLC communication chip series, this core chip that is specifically designed by SGS Inc. as a communication channel for uses in the smart devices which use in the low voltage networks and the medium voltage networks as part of the Components of Smart Grid . 

 

This chip is a highly integrated module for communication over power line, the chip includes ARM core, FSK, PSK, SSC and DBPSK modulation and demodulation module, a low noise amplifier gain control LNA, PGA and low-IF signal amplification UART; the ARM core By bus and FSK, PSK and DBPSK modulation demodulation module connector  uses the internal integration of high-performance micro-controller (MCU) , and Programmable Gain Amplifier (PGA), 10-bit A / D converter, 8 The D / A converter, the digital filter, the digital demodulator and the a real-time clock (RTC),

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